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  chr3352 - qeg rohs compliant ref. : dschr3352 - qeg1192 - 11 jul 11 1 / 16 specifications subject to change without notice united monolithic semiconductors s.a.s. route dpartementale 128 - bp46 - 91401 orsay cedex france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 12 - 16ghz integrated down converter gaas monolithic microwave ic in smd leadless package description the chr3352 - qeg is a multifunction monolithic circuit, which integrate s a balanced cold fet mixer, a lo buffer and a rf lna including gain control . it is designed for a wide range of applications, typically ism and commercial communication systems. the circuit is manufactured with a phem t process, 0.25m gate length, via holes through the substrate, air bridges and electron beam gate lithography. it is supplied in rohs compliant smd package. main features gain versus attenuation broadband rf performance 1 2 - 16 ghz 13 db conversion gain 9 db gain control 15 dbc image rejection 24lqfn4x5 C esd protected main characteristics tamb. = + 25c symbol parameter min typ max unit f rf rf frequency range 1 2 16 ghz f lo lo frequency range 8 .5 19.5 ghz f if if frequency range dc 3.5 ghz g c conversion gain 13 dbm 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 10 11 12 13 14 15 16 17 18 conversion gain (db) rf frequency (ghz) - 1,5 - 0,7 - 0,6 - 0,5 - 0,3 0,0
chr3352 - qeg 12 - 16ghz integrated down converter ref. : dschr3352 - qeg1192 - 11 jul 11 2 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 main characteristics tamb. = + 25c symbol parameter min typ max unit frf rf frequency range 1 2 16 ghz flo lo frequency range 8 .5 19.5 ghz fif if frequency range dc 3.5 ghz c g conversion gain@ min. attenuation (1) 12 db ?g gain control range 9 db nf noise figure@ min. attenuation , if>0.1ghz 2.7 db im_rej image rejection (1) 15 dbc plo lo input power 0 dbm iip3 input ip3@ at gc max. 2 dbm lo rl lo return loss - 12 db rf rl rf return loss - 12 db vd, vdl dc drain voltage 4.0 v idl lna current 1 2 0 ma id lo buffer current 1 30 ma vg 2, 3 lna dc gate voltage - 0.5 v b lo buffer dc gate voltage - 3 v i b lo buffer dc gate current - 7 ma gc gain control dc voltage - 1.5 0 v (1) an external combiner 90 is required on i / q these values are representative of on - board measurements. note: id is not affected by gc. electrostatic discharge sensitive device , observe handling precautions!
12 - 16ghz integrated down converter chr3352 - qeg ref. : dschr3352 - qeg1192 - 11 jul 11 3 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 absolute maximum ratings (1) tamb.= + 25c symbol parameter values unit vd, vdl maximum drain bias voltage 4.5 v id_total maximum drain bias current 420 ma vgl lna dc gate voltage - 2.0 to +0.4 v b buffer, mixer dc gate voltage - 4 v gc gain control voltage - 2.5 to + 0.8 v p_rf maximum peak input power overdrive 10 dbm p_lo maximum lo input power 5 dbm tch maximum channel temperature 175 c ta operating temperature range - 40 to +85 c tstg storage temperature range - 55 to +1 5 0 c (1) operation of this device above anyone of these parameters may cause permanent damage. typical bias conditions tamb.= + 25c symbol pad n o parameter values unit vd l , vd 1 0 , 1 1 dc drain voltage s 4 v idl 10 lna current controlled with vg2, 3 12 0 ma vg2, 3 8, 9 lna dc gate voltage - 0. 5 v b 12 buffer dc gate voltage - 3 v gc 7 gain control dc voltage - 1.5 to 0 v
chr3352 - qeg 12 - 16ghz integrated down converter ref. : dschr3352 - qeg1192 - 11 jul 11 4 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 device thermal performances all the figures given in this section are obtained assuming that the qfn device is cooled down only by conduction through the package thermal pad (no convection mode considered). the temperature is monitored at the package back - side interface (tcase) as shown below. the system maximum temperature must be adjusted in order to gu arantee that tcase remains below than the maximum value specified in the next table. so, the system pcb must be designed to comply with this requirement. a derating must be applied on the dissipated power if the tcase temperature can not be maintained bel ow than the maximum temperature specified (see the curve pdiss. max) in order to guarantee the nominal device life time (mttf). recommended max. junction temperature (tj max) : 174 c junction temperature absolute maximum rating : 175 c max. continuous dissipated power (pdiss. max.) : 1.0 w => pdiss. max. derating above tcase (1) = 85 c : 11 mw/c junction-case thermal resistance (rth j-c) (2) : <89 c/w minimum tcase operating temperature (3) : -40 c maximum tcase operating temperature (3) : 85 c minimum storage temperature : -55 c maximum storage temperature : 150 c (1) derating at junctio n temperature co nstant = tj max. (2) rth j-c is calculated fo r a wo rst case co nsidering the ho t t e s t junc t io n o f the m m ic and all the devices biased. (3) tcase=p ackage back side temperature measured under the die-attach-pad (see the drawing belo w). 6.0 device thermal specification : chr3352-qeg 0 0.2 0.4 0.6 0.8 1 1.2 - 50 - 25 0 25 50 75 100 125 150 175 pdiss. max. @tj 12 - 16ghz integrated down converter chr3352 - qeg ref. : dschr3352 - qeg1192 - 11 jul 11 5 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 typical measured performances (1) tamb = +25c, vd=vdl= 4v, vg2=vg3= - 0. 5 v, vgm = - 0.7v, p_lo = 0dbm board losses de - embedded (result given on package access planes) conversion gain versus rf & if frequencies rf = lo+ if, gc = - 1.5v & 0v (1) if no specific mention, the following values are representative of onboard measurements (on connector access planes) as defined on the drawing at paragraph evaluation mother board . the board losses are estimated f rom 0.8 to 1.2db in the frequency range. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 10 11 12 13 14 15 16 17 18 conversion gain (db) rf frequency (ghz) atten min @2ghz atten min @3,5ghz atten max @2ghz atten max @3,5ghz
chr3352 - qeg 12 - 16ghz integrated down converter ref. : dschr3352 - qeg1192 - 11 jul 11 6 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 typical measured performances tamb = +25c, vd=vdl= 4v, vg2=vg3= - 0. 5 v, vgm = - 0.7v, p_lo = 0dbm board losses de - embedded (result given on package access planes) conversion gain in supradyne mode versus rf frequency & gc rf = lo+ if, if = 2ghz conversion gain in infradyne mode versus rf frequency & gc rf = lo - if, if = 2ghz 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 10 11 12 13 14 15 16 17 18 conversion gain (db) rf frequency (ghz) gc= - 1,5v gc= - 0,7v gc= - 0,6v gc= - 0,5v gc= - 0,3v gc= - 0v 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 10 11 12 13 14 15 16 17 18 conversion gain (db) rf frequency (ghz) gc= - 1,5v gc= - 0,7v gc= - 0,6v gc= - 0,5v gc= - 0,3v gc= - 0v
12 - 16ghz integrated down converter chr3352 - qeg ref. : dschr3352 - qeg1192 - 11 jul 11 7 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 typical measured performances tamb = +25c, vd=vdl= 4v, vg2=vg3= - 0. 5 v, vgm = - 0.7v, p_lo = 0dbm board losses de - embedded (result given on package access planes) noise figure versus frequency rf = lo+/ - if, if = 2ghz, gc = - 1.5 & 0v return loss versus frequency gc = - 1.5v 1 2 3 4 5 6 7 8 10 11 12 13 14 15 16 17 18 noise figure (db) rf frequency (ghz) nf_i atten min nf_i atten max nf_q atten min nf_q atten max -30 -25 -20 -15 -10 -5 0 0 5 10 15 20 frequency (ghz) return loss (db) rf return loss lo return loss
chr3352 - qeg 12 - 16ghz integrated down converter ref. : dschr3352 - qeg1192 - 11 jul 11 8 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 typical measured performances tamb = +25c, vd=vdl= 4v, vg2=vg3= - 0. 5 v, vgm = - 0.7v, p_lo = 0dbm board losses de - embedded (result given on package access planes) image rejection versus frequency rf = lo+/ - if, if = 2ghz, gc = - 1.5v image rejection versus frequency rf = lo+/ - if, if = 3.5ghz, gc = - 1.5v 5 10 15 20 25 30 35 40 10 11 12 13 14 15 16 17 18 image rejection (db) rf frequency (ghz) channel i fi=2ghz channel q fi=2ghz 5 10 15 20 25 30 35 40 10 11 12 13 14 15 16 17 18 image rejection (db) rf frequency (ghz) channel i fi=3,5ghz channel q fi=3,5ghz
12 - 16ghz integrated down converter chr3352 - qeg ref. : dschr3352 - qeg1192 - 11 jul 11 9 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 typical measured performances tamb = +25c, vd=vdl= 4v, vg2=vg3= - 0. 5 v, vgm = - 0.7v, p_lo = 0dbm board losses de - embedded (result given on package access planes) input ip3 versus freq. at gc = - 1.5v imd3 versus freq. at gc = - 1.5v input ip3 versus gc at 16ghz input ip3 vs temperature at 13 ghz - 6 - 4 - 2 0 2 4 6 8 10 12 14 16 - 30 - 28 - 26 - 24 - 22 - 20 - 18 - 16 input ip3 (dbm) input power dcl (dbm) 13ghz 16ghz 20 25 30 35 40 45 50 55 60 65 70 75 80 - 30 - 28 - 26 - 24 - 22 - 20 - 18 - 16 imd3 (dbc) input power dcl (dbm) 13ghz 16ghz - 6 - 4 - 2 0 2 4 6 8 10 12 14 16 - 30 - 28 - 26 - 24 - 22 - 20 - 18 - 16 input ip3 (dbm) input power dcl (dbm) - 1.5v - 0.7v - 0.6v - 0.5v - 0.3v 0v - 6 - 5 - 4 - 3 - 2 - 1 0 1 2 3 4 5 6 - 30 - 28 - 26 - 24 - 22 - 20 - 18 - 16 input ip3 (dbm) input power dcl (dbm) 85 c; - 1.5v 25 c; - 1.5v - 40 c; - 1.5v 85 c; - 0.6v 25 c; - 0.6v - 40 c; - 0.6v
chr3352 - qeg 12 - 16ghz integrated down converter ref. : dschr3352 - qeg1192 - 11 jul 11 10 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 typical measured performances tamb = +25c, tcold = - 40c, thot = +85c vd=vdl= 4v, vg2=vg3= - 0. 5 v, vgm = - 0.7v, p_lo = 0dbm board losses de - embedded (result given on package access planes) conversion gain vs temperature if = 2ghz, gc = - 1.5v & 0v conversion gain vs temperature if = 3.5ghz, gc = - 1.5v & 0v noise figure vs temperature supradyne, if = 2ghz, gc = - 1.5v noise figure vs temperature infradyne, if = 2ghz, gc = - 1.5v spurious on if outputs p_rf = - 20dbm / p_lo = 0dbm @12ghz nlo mrf 0 1 2 3 4 0 xx 12 9 22 >40 1 26 24 >40 32 >40 2 39 >40 37 >40 >40 3 33 >40 >40 >40 >40 4 >40 >40 >40 >40 >40 all values in dbc below if power level (if = 1ghz). data measured without external hybrid coupler. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 10 11 12 13 14 15 16 17 18 conversion gain (db) rf frequency (ghz) gain max ta= - 40 c gain min ta= - 40 c gain max ta=+25 c gain min ta=+25 c gain max ta=+85 c gain min ta=+85 c - 3 - 2 - 1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 10 11 12 13 14 15 16 17 18 conversion gain (db) rf frequency (ghz) gain max ta= - 40 c gain min ta= - 40 c gain max ta=+25 c gain min ta=+25 c gain max ta=+85 c gain min ta=+85 c 1 2 3 4 5 6 7 8 10 11 12 13 14 15 16 17 18 noise figure (db) rf frequency (ghz) - 40 c +25 c +85 c 1 2 3 4 5 6 7 8 10 11 12 13 14 15 16 17 18 noise figure (db) rf frequency (ghz) - 40 c +25 c +85 c
12 - 16ghz integrated down converter chr3352 - qeg ref. : dschr3352 - qeg1192 - 11 jul 11 11 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 package outline (1) matt tin, lead free (green) 1 - nc 9 - vg3 17 - nc units : mm 2 - nc 10 - vdl 18 - nc from the standard : jedec mo - 220 3 - nc 11 - vd 19 - nc (vggd) 4 - gnd (2) 12 - b 20 - if_i 25 - gnd 5 - rf in 13 - nc 21 - gnd (2) 6 - nc 14 - nc 22 - if_q 7 - gc 15 - lo in 23 - nc 8 - vg2 16 - gnd (2) 24 - nc (1) the package outline drawing included to this data - sheet is given for indication. refer to the application note an0017 ( http://www.ums - gaas.com ) for exact package dimensions. (2) it is strongly recommended to ground all pins marked gnd through the pcb board. ensure that the pcb board is designed to provide the best possible ground to t he package.
chr3352 - qeg 12 - 16ghz integrated down converter ref. : dschr3352 - qeg1192 - 11 jul 11 12 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 due to esd protection circuits on rf input and output, an external capacitance might be requested to isolate the product from external voltage that could be present on the rf accesses. esd protections are also implemented on gate and control accesses. the dc connections do not include any decoupling capacitor in package, therefore it is mandatory to provide a good external dc decoupling (10nf) on the pc board, as close as possible to the package. nc 8 9 10 11 12 rf in gnd if_q if_i nc nc vdl gc vg2 vg3 vd b 20 22 23 21 24 1 2 3 4 5 6 14 15 16 17 18 19 7 13 lo in nc nc nc nc gnd nc nc nc gnd nc nc nc 8 9 10 11 12 rf in gnd if_q if_i nc nc vdl gc vg2 vg3 vd b 20 22 23 21 24 1 2 3 4 5 6 14 15 16 17 18 19 7 13 lo in nc nc nc nc gnd nc nc nc gnd nc nc rf in gnd if_q if_i nc nc vdl gc vg2 vg3 vd b 20 22 23 21 24 1 2 3 4 5 6 14 15 16 17 18 19 7 13 lo in nc nc nc nc gnd nc nc nc gnd nc nc
12 - 16ghz integrated down converter chr3352 - qeg ref. : dschr3352 - qeg1192 - 11 jul 11 13 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 dc schematic lo amplifier and mixer: 4v, 130ma; - 3v, 7ma lna: 4v, 1 2 0ma 61ma 44 ma 14 ma 30 ma x5 vd 855 ? lo 25 ? b 1.8 k ? 365 ? 5 ? 390 ? 50 ma 6 ? 1.5 k ? 1.5 k ? 300 ? 300 ? 1425 ? 1425 ? if i if q mixer lo amplifier 50 ma 7 ma 30 ma x5 vd 855 ? lo 25 ? b 1.8 k ? 365 ? 5 ? 390 ? 50 ma 6 ? 1.5 k ? 1.5 k ? 300 ? 300 ? 1425 ? 1425 ? if i if q mixer lo amplifier 50 ma 7 ma 22 ma vg2 vdl 300 ? 1615 ? 47 ? rf 40 ? 66 ma 800 ? 200 ? 92 ma 2 k ? 800 ? 800 ? x4 gc 8 ? 2 ? x2 x2 vg3 280 ? 280 ? 22 ma vg2 vdl 300 ? 1615 ? 47 ? rf 40 ? 66 ma 800 ? 200 ? 92 ma 2 k ? 800 ? 800 ? x4 gc 8 ? 2 ? x2 x2 vg3 280 ? 280 ?
chr3352 - qeg 12 - 16ghz integrated down converter ref. : dschr3352 - qeg1192 - 11 jul 11 14 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 evaluation mother board compatible with the proposed footprint. based on typically ro4003 / 8mils or equivalent. using a micro - strip to coplanar transition to access the package. recommended for the implementation of this prod uct on a module board. decoupling capacitors of 10nf 10% are recommended for all dc accesses. see application note an0017 for details. hybrid coupler 90 ; 2 - 4ghz gc vg2 vg3 vdl vd b q i rf lo
12 - 16ghz integrated down converter chr3352 - qeg ref. : dschr3352 - qeg1192 - 11 jul 11 15 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 notes
chr3352 - qeg 12 - 16ghz integrated down converter ref. : dschr3352 - qeg1192 - 11 jul 11 16 / 16 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 recommended package footprint refer to the application note an0017 available at http://www.ums - gaas.com for package foot print recommendations. smd mounting procedure for the mounting process standard techniques involving solder paste and a suitable reflow process can be used. for further details, see application note an0017. recommended environmental management refer to the application note an0019 available at http://www.ums - gaas.com for environmental data on ums package products. recommended esd management refer to the application note an0020 available at http://www.ums - gaas.com for esd sensitivity and handling recommendations for the ums package products. ordering information qfn 4x5 rohs compliant package: chr3352 - qeg /xy stick: xy = 20 tape & reel: xy = 21 information furnished is believed to be accurate and reliable. however united monolithic semiconductors s.a.s. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent righ ts of united monolithic semiconductors s.a.s. . specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. united monolithic semiconductors s.a.s. products are not authorised for use as critical components in life support devices or systems without express written approval from united monolithic semiconductors s.a.s.


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